Table of Contents
- 1. Introduction
- 2. Scope
- 3. Overview of Technical Characteristics
- 4. Security Characteristics
- 5. Hardware Description
- 1. Mechanics
- 2. AT91SAMA5D3x Processor Core
- 3. Memory
- 4. Bus Matrix
- 5. Advanced Interrupt Controller (AIC)
- 6. Battery Backup
- 7. Reset Controller (RSTC)
- 8. Peripheral Input/Output Controller (PIO)
- 9. Clock Generation
- 10. Power Management Controller (PMC)
- 11. Timer Counter (TC)
- 12. Pulse Width Modulation Controller (PWM)
- 13. Periodic Interval Timer (PIT)
- 14. Watchdog Timer
- 15. Real-time Clock (RTC)
- 16. DMA Controller (DMAC)
- 17. Debug Unit (DBGU)
- 18. JTAG Unit
- 19. Two-wire Interface (TWI)
- 20. Multimedia Card Interface (MCI)
- 21. USB Host Port (UHP)
- 22. USB Device Port (UDP)
- 23. Ethernet MAC (EMAC)
- 24. Gigabit Ethernet MAC (GMAC)
- 25. Controller Area Network (CAN)
- 26. Software Modem Device (SMD)
- 27. Universal Sychronous Asynchronous Receiver and Transmitter (USART)
- 28. Synchronous Peripheral Interface (SPI)
- 29. Synchronous Serial Controller (SSC)
- 30. Image Sensor Interface (ISI)
- 31. LCD controller
- 32. Touch Screen ADC Controller (ADC)
- 6. Design Considerations
- A. Peripheral Color Codes
- B. Peripheral Identifiers
- C. Address Map (Physical Address Space)
- D. StampA5D3X Pin Assignment
- E. StampA5D3x Electrical Characteristics
- F. StampA5D3x Clock Characteristics
- G. StampA5D3x Environmental Ratings
- H. StampA5D3x Dimensions
- I. PortuxA5/Starterkit Schematics
List of Figures
- H.1. StampA5D3x Dimensions
- I.1. PortuxA5 FX8,BT
- I.2. PortuxA5 VG96,TFT
- I.3. PortuxA5 Interface
- I.4. PortuxA5 Ethernet
- I.5. PortuxA5 Power
List of Tables
- 2.1. SAMA5D3X Device Differences
- 5.1. Bus Matrix Masters
- 5.2. Bus Matrix Slaves
- 5.3. AT91SAMA5D3x Clocks
- 5.4. DMAC0 Channels Definition
- 5.5. DMAC1 Channels Definition
- 5.6. LCDC palette entry
- 5.7. LCDC 24 bit memory organization
- 6.1. SAMA5D3X Boot Sequence
- 6.2. Pins Driven by Boot on Stamp Interface
- B.1. Peripheral Identifiers
- C.1. Physical Address Space
- D.1. Pin Assignment BUS Interface X2
- D.2. Pin Assignment IO Interface X1
- E.1. Electrical Characteristics
- F.1. Clock Characteristics
- G.1. Environmental Ratings