3. Bus Matrix

The bus matrix of AT91SAM-controllers allows many master and slave devices to be connected independently of each other. Each master has a decoder and can be defined specially for each master. This allows concurrent access of masters to their slaves (provided the slave is available).

The bus matrix is thus the bridge between external devices connected to the EBI, the microcontroller's embedded peripherals and the CPU core.

Master 0 ARM926™ Instruction
Master 1 ARM926™ Data
Master 2 PDC
Master 3 ISI Controller
Master 4 Ethernet MAC
Master 5 USB Host DMA

Table 4.1. Bus Matrix Masters

Slave 0Internal SRAM0 16KB
Slave 1Internal SRAM1 16KB
Slave 2Internal ROM / USB Host User Interface
Slave 3External Bus Interface (EBI)
Slave 4Internal Peripherals

Table 4.2. Bus Matrix Slaves